• DocumentCode
    2679671
  • Title

    Progress and outlook for STT-MRAM

  • Author

    Huai, Yiming ; Zhou, Yuchen ; Tudosa, Ioan ; Malmhall, Roger ; Ranjan, Rajiv ; Zhang, Jing

  • Author_Institution
    Avalanche Technol., Fremont, CA, USA
  • fYear
    2011
  • fDate
    7-10 Nov. 2011
  • Firstpage
    235
  • Lastpage
    235
  • Abstract
    New product applications have an increasing demand for a non-volatile memory (NVM) exhibiting higher speeds, extended endurance and lower power consumption as existing solutions are not fully capable to deliver on all of these attributes. Of the group of new NVMs, Phase-change RAM (PRAM), Resistive RAM (RRAM) and Spin-Transfer Torque based MRAM (STT-MRAM) [1-8], STT-MRAM has the most attractive combination of fast read and write speed (<;30 ns) and high endurance (>;1015) along with non-volatility. We will review the recent progress on STT-MRAM at both the MTJ device and CMOS integrated chip levels. In the technical area, the key focus is switching current (or voltage) reduction at short pulse width (<;10 ns) while maintaining high magnetic bit thermal stability. Results from novel MTJs achieving low switching current while maintaining high thermal stability will be presented. First generation STT-MRAM products are being targeted using in-plane based MTJs, and future products below 45 nm will likely require perpendicular MTJ (pMTJ) designs. The later is the key focus of recent research in this area. We will review the current state of pMTJ development, along with micromagnetic modeling results for key understanding of STT switching dynamics and latest experimental data of pMTJs. Finally, we discuss the market positioning of the STT-MRAM. While it is currently being targeted for stand-alone commodity memory (replacing DRAM) [4], and embedded memory (replacing embedded Flash, SRAM and DRAM) [6], new market applications such as storage-class solid state drives and embedded solutions in advanced System-on-Chip (SoC) are also being explored. We will compare key value adds from STT-MRAM in these emerging market segments.
  • Keywords
    CMOS integrated circuits; SRAM chips; concurrency theory; system-on-chip; thermal stability; CMOS integrated chip level; MTJ device; PRAM; STT switching dynamics; STT-MRAM; commodity memory; embedded memory; high magnetic bit thermal stability; market positioning; micromagnetic modeling; nonvolatile memory; phase-change RAM; power consumption; resistive RAM; spin-transfer torque; storage-class solid state drives; system-on-chip; CMOS integrated circuits; Nonvolatile memory; Random access memory; Switches; System-on-a-chip; Thermal stability; Torque; MTJ; STT-RAM; Spintronic Memory; pMTJ;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA
  • ISSN
    1092-3152
  • Print_ISBN
    978-1-4577-1399-6
  • Electronic_ISBN
    1092-3152
  • Type

    conf

  • DOI
    10.1109/ICCAD.2011.6105332
  • Filename
    6105332