Title :
Fast algorithms for compositions of Arithmetic Transforms and their extensions
Author :
Pang, Yu ; Radecka, Katarzyna ; Zilic, Zeljko
Author_Institution :
Dept. of Electr. & Comput. Eng., Mcgill Univ., Montreal, QC
Abstract :
This paper considers the construction of canonical representations of datapath circuits by arithmetic transform (AT) and its extensions to express word-level representations of combinational and sequential blocks for hardware verification and component matching. Construction of an overall circuit by composition helps engineers to process a block-level netlist representing a complex circuit and to obtain its transform efficiently. To facilitate the composition, several subroutines are proposed, and integrated into a new fast algorithm.
Keywords :
arithmetic; formal verification; high level synthesis; logic design; transforms; arithmetic transforms; block-level netlist; canonical datapath circuit representations; combinational blocks; component matching; fast algorithms; hardware verification; sequential blocks; word-level representations; Algorithm design and analysis; Boolean functions; Circuits; Data engineering; Delay; Digital arithmetic; Field programmable gate arrays; Hardware; Polynomials; Taylor series;
Conference_Titel :
Circuits and Systems and TAISA Conference, 2008. NEWCAS-TAISA 2008. 2008 Joint 6th International IEEE Northeast Workshop on
Conference_Location :
Montreal, QC
Print_ISBN :
978-1-4244-2331-6
Electronic_ISBN :
978-1-4244-2332-3
DOI :
10.1109/NEWCAS.2008.4606384
