Power system on a chip (PSoC): analog emulation for power system applications

This contribution addresses VLSI-based hardware analog emulators of power systems. The goal is to develop a computational tool we refer to as a power system on a chip (PSoC). We review various problems and proposed solutions encountered from the design stage to the PC-board hardware implementation stage and finally to the anticipated VLSI implementation stage. In addition to various characteristic features, it has already been noted that using analog emulation for power system analysis allows for reduction in computation time, without significant loss in accuracy, compared to numerical methods. We further validate this through observations obtained from comparative runs between software and analog hardware environments