DocumentCode :
2680396
Title :
STT-RAM cell design optimization for persistent and non-persistent error rate reduction: A statistical design view
Author :
Zhang, Yaojun ; Wang, Xiaobin ; Chen, Yiran
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Pittsburgh, Pittsburgh, PA, USA
fYear :
2011
fDate :
7-10 Nov. 2011
Firstpage :
471
Lastpage :
477
Abstract :
The rapidly increased demands for memory in electronic industry and the significant technical scaling challenges of all conventional memory technologies motivated the researches on the next generation memory technology. As one promising candidate, spin-transfer torque random access memory (STT-RAM) features fast access time, high density, non-volatility, and good CMOS process compatibility. However, like all other nano-scale devices, the performance and reliability of STT-RAM cells are severely affected by process variations, intrinsic device operating uncertainties and environmental fluctuations. In this work, we systematically analyze the impacts of CMOS and MTJ process variations, MTJ switching uncertainties induced by thermal fluctuations and working temperature on the performance and reliability of STT-RAM cells. A combined circuit and magnetic simulation platform is also established to quantitatively analyze the persistent and non-persistent error rates during the STT-RAM cell operations. Finally, an optimization flow and its effectiveness are depicted by using some STT-RAM cell designs as case study.
Keywords :
CMOS digital integrated circuits; electronics industry; integrated circuit design; random-access storage; statistical analysis; CMOS process compatibility; MTJ process variations; STT-RAM cell design optimization; circuit simulation platform; electronic industry; environmental fluctuations; intrinsic device operating uncertainties; magnetic simulation platform; nanoscale devices; next generation memory technology; nonpersistent error rate reduction; optimization flow; persistent error rate reduction; spin-transfer torque random access memory; statistical design view; switching uncertainties; technical scaling; thermal fluctuations; working temperature; Fluctuations; MOSFETs; Magnetic tunneling; Random access memory; Resistance; Switches; Spin-transfer torque (STT); magnetic RAM; non-persistent error; persistent error; process variation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA
ISSN :
1092-3152
Print_ISBN :
978-1-4577-1399-6
Electronic_ISBN :
1092-3152
Type :
conf
DOI :
10.1109/ICCAD.2011.6105370
Filename :
6105370
Link To Document :
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