• DocumentCode
    2680431
  • Title

    Rate-Optimal DSP Synthesis by Pipeline and Minimum Unfolding

  • Author

    Jeng, Lih-Gwo ; Chen, Liang-Gee

  • Author_Institution
    National Taiwan University
  • fYear
    1993
  • fDate
    3-6 Jan 1993
  • Firstpage
    148
  • Lastpage
    153
  • Keywords
    Application specific integrated circuits; Digital signal processing; Digital signal processing chips; Feedback loop; Flow graphs; Hardware; Partitioning algorithms; Pipelines; Processor scheduling; Scheduling algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 1993. Proceedings. The Sixth International Conference on
  • ISSN
    1063-9667
  • Print_ISBN
    0-8186-3180-5
  • Type

    conf

  • DOI
    10.1109/ICVD.1993.669668
  • Filename
    669668
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2680431