DocumentCode
2680515
Title
A methodology for local resonant clock synthesis using LC-assisted local clock buffers
Author
Condley, Walter J., II ; Hu, Xuchu ; Guthaus, Matthew R.
Author_Institution
Dept. of Comput. Eng., Univ. of California Santa Cruz, Santa Cruz, CA, USA
fYear
2011
fDate
7-10 Nov. 2011
Firstpage
503
Lastpage
506
Abstract
Resonant clocking is a form of adiabatic clocking that retains much of the energy present in clock switching and recycles it into the following clock cycle. In this paper we present the first automated methodology using LC-assisted local clock buffers (LCLCB) for generating local resonant clocks. This uses a single-buffer single-inductor sector topology applied to non-uniform trees as found in most ASIC designs. We show that this form of adiabatic clocking can achieve power savings as much as 75% over traditional buffered clock networks.
Keywords
application specific integrated circuits; buffer circuits; clock distribution networks; clocks; inductors; network synthesis; ASIC designs; LC-assisted local clock buffers; adiabatic clocking; buffered clock networks; clock switching; local resonant clock synthesis; single-buffer single-inductor sector topology; Capacitance; Clocks; Impedance; Inductors; Partitioning algorithms; Power demand; Resonant frequency;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Print_ISBN
978-1-4577-1399-6
Electronic_ISBN
1092-3152
Type
conf
DOI
10.1109/ICCAD.2011.6105376
Filename
6105376
Link To Document