DocumentCode
2680965
Title
An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters
Author
Visvanathan, V. ; Mohanty, Nibedita ; Ramanathan, S.
Author_Institution
Indian Institute of Science
fYear
1993
fDate
3-6 Jan 1993
Firstpage
166
Lastpage
171
Keywords
Clocks; Computer architecture; Delay; Finite impulse response filter; Frequency; Hardware; Laboratories; Power dissipation; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1993. Proceedings. The Sixth International Conference on
ISSN
1063-9667
Print_ISBN
0-8186-3180-5
Type
conf
DOI
10.1109/ICVD.1993.669671
Filename
669671
Link To Document