Title :
An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters
Author :
Visvanathan, V. ; Mohanty, Nibedita ; Ramanathan, S.
Author_Institution :
Indian Institute of Science
Keywords :
Clocks; Computer architecture; Delay; Finite impulse response filter; Frequency; Hardware; Laboratories; Power dissipation; Throughput; Very large scale integration;
Conference_Titel :
VLSI Design, 1993. Proceedings. The Sixth International Conference on
Print_ISBN :
0-8186-3180-5
DOI :
10.1109/ICVD.1993.669671
