An Integrated and Accelerated ILP Solution for Scheduling, Module Allocation, and Binding in Datapath Synthesis

Author

Wilson, T.C. ; Mukherjee, N. ; Garg, M.K. ; Banerji, D.K.

Author_Institution

University of Guelph

fYear

1993

fDate

3-6 Jan 1993

Firstpage

192

Lastpage

197

Keywords

Acceleration; Laboratories; Libraries; Processor scheduling;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 1993. Proceedings. The Sixth International Conference on

ISSN

1063-9667

Print_ISBN

0-8186-3180-5

Type

DOI

10.1109/ICVD.1993.669676

Filename

669676

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