Analysis of a multi-layer fault-tolerant COTS architecture for deep space missions

Fault-tolerant systems are traditionally divided into fault containment regions and custom logic is added to ensure the effects of a fault within a containment region would not propagate to the other regions. This technique may not be applicable in a commercial-off-the-shelf (COTS) based system. While COTS technology is attractive due to its low cost, they are not developed with the same level of rigorous fault tolerance in mind. Furthermore, COTS suppliers usually have no interest to add any overhead or sacrifice performance to implement fault tolerance for a narrow market of high reliability applications. To overcome this shortcoming, Jet Propulsion Laboratory (JPL) has developed a multi-layer fault protection methodology to achieve high reliability in COTS-based avionics systems. This methodology has been applied to the bus architecture that uses the COTS bus interface standards IEEE 1394 and I²C. The paper first gives an overview of the multi-layer fault-protection design methodology for COTS based mission-critical systems. Then the effectiveness of the methodology is analyzed in terms of coverage and cost. The results are compared to the traditional custom designed system