Title :
Trends and challenges of SRAM reliability in the nano-scale era
Author :
Khan, Seyab ; Hamdioui, Said
Author_Institution :
Comput. Eng. Lab., Delft Univ. of Technol., Delft, Netherlands
Abstract :
According to the International Technology Roadmap for Semiconductors (ITRS), embedded Static Random Access Memory (SRAM) will continue to dominate the area of System on Chips (SoCs) approaching 90% in the next 10 years. Therefore, SRAM reliability will have a significant impact on overall SoC reliability. This paper presents state-of-the-art transistor failure mechanisms and their impact on SRAM reliability parameters including cell stability, cell read failures, and cell access time failures. Furthermore, different techniques currently employed in industry, to mitigate the impacts of the failure mechanisms are presented. Finally, based on the current scaling trends reliability challenges of future transistors and embedded SRAM are discussed. The discussion concludes that the reliability challenges in future embedded SRAM will increase significantly.
Keywords :
MOSFET; SRAM chips; embedded systems; nanoelectronics; semiconductor device reliability; system-on-chip; International Technology Roadmap for Semiconductors; MOS transistor; SRAM reliability; SoC reliability; cell access time failure; cell read failure; cell stability; current scaling; embedded SRAM; embedded static random access memory; nano-scale era; system on chip; transistor failure; Degradation; Electronics industry; Embedded computing; Fabrication; Failure analysis; MOSFETs; Random access memory; Semiconductor device reliability; Threshold voltage; Transconductance;
Conference_Titel :
Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2010 5th International Conference on
Conference_Location :
Hammamet
Print_ISBN :
978-1-4244-6338-1
DOI :
10.1109/DTIS.2010.5487565