DocumentCode :
2683288
Title :
Dopant free multi-gate silicon nanowire CMOS-inverter on SOI substrate
Author :
Wessely, Frank ; Krauss, Tillmann ; Endres, Ralf ; Schwalke, Udo
Author_Institution :
Inst. for Semicond. Technol. & Nanoelectron., Darmstadt Univ. of Technol., Darmstadt, Germany
fYear :
2010
fDate :
23-25 March 2010
Firstpage :
1
Lastpage :
3
Abstract :
In this work, we report on the fabrication and characterization of voltage-programmable (VP) nanowire (NW) field-effect-transistor (FET) devices suitable to extend the flexibility in circuit design, i.e. of reconfigurable logic. Ultra-thin silicon NW-structures with mid-gap Schottky S/D junctions on silicon-on-insulator (SOI) substrate have been fabricated as dopant free unipolar CMOS transistors. The desired device type, i.e. NMOS or PMOS, is selected by applying an appropriate back-gate bias voltage. The programming capability of the devices fabricated using this approach is demonstrated experimentally using a VP-NW-CMOS inverter circuit on a multi-SOI-like set-up.
Keywords :
CMOS integrated circuits; field effect transistors; invertors; nanowires; network synthesis; semiconductor doping; CMOS-inverter; SOI substrate; circuit design; dopant free multi-gate silicon nanowire; field-effect-transistor devices; voltage-programmable nanowire; CMOS technology; Fabrication; Integrated circuit technology; Inverters; Lithography; MOSFETs; Nanoscale devices; Silicon; Substrates; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2010 5th International Conference on
Conference_Location :
Hammamet
Print_ISBN :
978-1-4244-6338-1
Type :
conf
DOI :
10.1109/DTIS.2010.5487572
Filename :
5487572
Link To Document :
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