DocumentCode :
2683567
Title :
Performance Aspects of Gate Matrix Layout
Author :
Hald, Bjarne ; Madsen, Jan
Author_Institution :
Technical University of Denmark
fYear :
1993
fDate :
3-6 Jan 1993
Firstpage :
226
Lastpage :
229
Keywords :
CMOS technology; Circuit optimization; Computer science; Heuristic algorithms; Joining processes; Parasitic capacitance; Power supplies; Signal generators; Testing; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1993. Proceedings. The Sixth International Conference on
ISSN :
1063-9667
Print_ISBN :
0-8186-3180-5
Type :
conf
DOI :
10.1109/ICVD.1993.669684
Filename :
669684
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2683567
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