Power Efficient Implementation of Motion Estimation for Portable Devices

Recently, the growth in wireless communication has led to increase in demand for high quality video telephony over portable devices. The challenge is to achieve the high quality video encoding performance at real time with minimum power consumption. Many DSP based processor architectures are targeted for the above requirement. The objective is to develop the video coding algorithms in such a way that it best utilizes the processor architecture. In this paper, we discuss power efficient implementation methods of motion estimation algorithm to suit the DSP based processor architecture. Proposed schemes are optimal pixel sub sampling pattern for SAD computation and half pixel estimation derived from SAD of integer search. Further, we suggest methods for improving the motion estimation decision capability by adjusting the SAD adaptively and improving picture quality by intelligent macroblock coding type decision.