Title :
Efficient output ESD protection for 0.5-μm high-speed CMOS SRAM IC with well-coupled technique
Author :
Ker, Ming-Dou ; Wu, Chau-Neng
Author_Institution :
Industrial Technology Research Institute
Keywords :
CMOS integrated circuits; CMOS technology; Electrostatic discharge; High speed integrated circuits; MOS devices; Protection; Random access memory; Resistors; Stress; Voltage;
Conference_Titel :
Reliability of Electron Devices, Failure Physics and Analysis, 1996. Proceedings of the 7th European Symposium on
Print_ISBN :
0-7803-3369-1
DOI :
10.1109/ESREF.1996.888203
