An efficient packet scheduler for modern network processors: guarantee load balancing and packet ordering

Multi-processors in modern network processors (NPs) are often organized as parallel processing elements (PEs) to achieve efficient packet forwarding for 10 Gbps high-speed links. It´s a challenge to schedule the incoming packets from high-speed links to be processed by multiple PEs in parallel. In this paper, we present a novel packet scheduling scheme for 10 Gbps network processors, which satisfies both load balancing and in-order requirements in packet processing. Our Packet scheduler differentiates the types of IP packet flows and makes a different dispatching decision between TCP and non-TCP flows. Non-TCP flows are uniformly sprayed among different PEs. For TCP flows, packet scheduler maintains a two-stage indirect mapping table to cache the mapping relationship between different TCP flows and target PEs to guarantee packet-ordering within the same flows. Meanwhile, it uses a designed fuzzy feedback control loop (F2CL) to maintain load-balancing among PEs. The effectiveness of the packet scheduler with the well-chosen design parameters is evaluated by simulation with extrapolated workloads