Title :
A novel FIR filter compiler with performance evaluation
Author :
Bo Shen ; Qianling Zhang
Author_Institution :
ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China
Abstract :
A novel FIR filter compiler (FiltGen) is proposed. FiltGen has the capability to automatically estimate the area/speed performance of FIR filters, and based on this, it generates the best architecture suitable for VLSI implementation. In addition, it uses several techniques to further reduce the area and power of FIR filters.
Keywords :
FIR filters; VLSI; performance evaluation; FIR filter compiler; FiltGen; VLSI implementation; performance evaluation;
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
Print_ISBN :
0-7803-7889-X
DOI :
10.1109/ICASIC.2003.1277328
