The design of 802.11b WLAN baseband processor

The architecture of a baseband processor designed for IEEE 802.11b wireless local area network (WLAN) is described in the paper. The main theme is focused on synchronization, acquisition and complementary code keying (CCK) demodulation. A special transposed architecture of the correlator is investigated, which will be utilized during synchronization and acquisition. The antenna lock technique during acquisition is also described here. The CCK demodulator is implemented with fast Walsh transform (FWT), followed by a symbol decision module, which is designed with a novel algorithm and can be implemented with much less hardware.