Title :
Equalizer for 10Base-T/100Base-TX Ethernet transceiver based on DSP structure
Author :
Ye Fan ; Wang Yan ; Ren Junyan
Author_Institution :
ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China
Abstract :
10Base-T/100Base-TX, the prevalent local area network (LAN) standard, is operated at symbol rate of 20 or 125 Mb/s through category-5 unshelled twist pair (UTP). A DSP based equalizer is presented in order to adaptively recover data sequence from received signal. The structure of decision feedback equalizer (DFE) allows error rate performance of cable length as long as 160m. Fabricated in a 0.18 μm N-well CMOS process, both digital and mixed signal simulation show error rate < 10-10.
Keywords :
CMOS digital integrated circuits; decision feedback equalisers; local area networks; telecommunication standards; transceivers; twisted pair cables; 0.18 microns; 100Base-TX Ethernet transceiver; 10Base-T Ethernet transceiver; 125 Mbit/s; 160 m; 20 Mbit/s; DFE; DSP based equalizer; DSP structure; LAN standard; N-well CMOS process; UTP; data sequence recovery; decision feedback equalizer; digital simulation; error rate performance; local area network; mixed signal simulation; unshelled twist pair;
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
Print_ISBN :
0-7803-7889-X
DOI :
10.1109/ICASIC.2003.1277349
