System-on-chip for mega-pixel digital camera processor with auto control functions

Author

Xuefeng Chen ; Feng Liu ; Jie He ; Jinghua Ye ; Yajie Qin ; Xiaofeng Yi ; Zhiliang Hong

Volume

2

fYear

2003

fDate

21-24 Oct. 2003

Firstpage

894

Abstract

A system on a chip design of digital camera processor for mega-pixel CCD digital camera is proposed. The processor integrates pipelined real-time digital image processor, JPEG codec and AE/AWB/AF controller. It supports 8-bit MCU and synchronous DRAM and provides interfaces to CCD, LCD, TV, PCMCIA, USB and EPP. The processor works in view-find, snapshot, playback and transfer modes. The snapshot speed is 5fps at 1.3M pixels and the view-find speed is fps. The chip is fabricated with 0.25 μm CMOS technology and has 200K logic gates with 12KB internal memory. The chip area is 25mm² and the power consumption is 500mW at 54MHz system clock.

Keywords

CCD image sensors; CMOS image sensors; microprocessor chips; system-on-chip; 0.25 microns; 1.3 Mpixels; 12 Kbyte; 500 mW; 54 MHz; 8-bit MCU; AE-AWB-AF controller; CCD digital camera; CMOS technology; JPEG codec; auto control functions; internal memory; logic gates; mega-pixel digital camera processor; pipelined real-time digital image processor; playback mode; snapshot mode; synchronous DRAM; system-on-chip; transfer mode; view-find modes;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2003. Proceedings. 5th International Conference on

ISSN

1523-553X

Print_ISBN

0-7803-7889-X

Type

conf

DOI

10.1109/ICASIC.2003.1277354

Filename

1277354