Title :
A mixed- signal physical design and its verification
Author :
Yue-li, Hu ; Ke, Yan
Author_Institution :
Key Lab. of Adv. Display & Syst. Applic., Shanghai Univ., Shanghai
Abstract :
More and more analog and mixed-signal (AMS) blocks are integrated into SoC (system-on-chip) platform due to intense market competition. A mixed signal /mixed power SoC design, using Synopsys Libraries, based on Chartered 0.35 um Salicide 2P4M CMOS mixed signal process is introduced in this paper. The method of supply the core with different powers, isolated the digital part and the analog part and splitting the padring is also proposed. The physical layout design and its verification are implemented using Astro and Calibre.
Keywords :
CMOS integrated circuits; integrated circuit layout; mixed analogue-digital integrated circuits; system-on-chip; Astro; Calibre; Synopsys Libraries; analog and mixed-signal blocks; mixed power SoC design; mixed-signal physical design; physical layout design; salicide 2P4M CMOS process; size 0.35 mum; system-on-chip; verification; CMOS process; Circuit noise; Electrostatic discharge; Integrated circuit interconnections; Integrated circuit noise; Libraries; Propagation delay; Protection; Signal design; Signal processing;
Conference_Titel :
Electronic Packaging Technology & High Density Packaging, 2008. ICEPT-HDP 2008. International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-2739-0
Electronic_ISBN :
978-1-4244-2740-6
DOI :
10.1109/ICEPT.2008.4607009
