DocumentCode
2686701
Title
Real-time digital video multiplexer synchronisation implementation with CPLD
Author
Sotudeh, R.
Volume
2
fYear
2003
fDate
21-24 Oct. 2003
Firstpage
914
Abstract
Many video applications in security areas such as close circuit television (CCTV) require multiple video channels which must be multiplexed into a single video stream. The industry can only afford to have a few frames or fields per camera. This paper emphasizes on a novel hardware design using an algorithm for synchronizing the analogue video inputs. Therefore the proposed multiplexer system is able to achieve a constant stream of 50 digital video fields per second using a CPLD (complex programmable logic device) for 625/50 video system.
Keywords
closed circuit television; multiplexing equipment; programmable logic devices; synchronisation; video signal processing; CCTV; CPLD; analogue video inputs; close circuit television; complex programmable logic device; hardware design; multiplexer system; real-time digital video multiplexer synchronisation; video channels; video stream; video system;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2003. Proceedings. 5th International Conference on
ISSN
1523-553X
Print_ISBN
0-7803-7889-X
Type
conf
DOI
10.1109/ICASIC.2003.1277359
Filename
1277359
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