• DocumentCode
    2687303
  • Title

    A Shared Memory Parallel Algorithm for Logic Synthesis

  • Author

    Lim, Chieng-Fai ; Banerjee, Prithviraj ; De, Kaushik ; Muroga, Saburo

  • Author_Institution
    Coordinated Science Lab
  • fYear
    1993
  • fDate
    3-6 Jan 1993
  • Firstpage
    317
  • Lastpage
    322
  • Keywords
    Aerodynamics; Circuit synthesis; Load management; Logic functions; Minimization methods; Network synthesis; Optimization methods; Parallel algorithms; Programmable logic arrays; Terminology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 1993. Proceedings. The Sixth International Conference on
  • ISSN
    1063-9667
  • Print_ISBN
    0-8186-3180-5
  • Type

    conf

  • DOI
    10.1109/ICVD.1993.669703
  • Filename
    669703
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2687303