DocumentCode :
2687626
Title :
Design of reusable test platform for microprocessor
Author :
Liu Ling ; Wang Yingchun ; Ji Lijiu
Author_Institution :
Peking Univ., Beijing, China
Volume :
2
fYear :
2003
fDate :
21-24 Oct. 2003
Firstpage :
1132
Abstract :
In this paper we present a design of a reusable test platform for microprocessors. This platform could automatically adapt to different set of microprocessors under test. It could be configured to various functional test environments as required, and also it integrates a CMDL (code mapping description language) assembler which gains general-purpose assemble capability to enhance the instructional-level retargetability of the platform. Experiments show that the platform works correctly, flexibly and efficiently.
Keywords :
integrated circuit testing; microprocessor chips; CMDL assembler; code mapping description language; functional test environments; general-purpose assemble capability; instructional-level retargetability; microprocessor; microprocessors under test; reusable test platform;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
ISSN :
1523-553X
Print_ISBN :
0-7803-7889-X
Type :
conf
DOI :
10.1109/ICASIC.2003.1277413
Filename :
1277413
Link To Document :
بازگشت