DocumentCode :
2687843
Title :
Development of plastic chip scale package for ATM switching systems
Author :
Harada, Akio ; Kaizu, Katsumi ; Yamanaka, Naoaki ; Kawamura, Tomoaki
Author_Institution :
NTT Network Service Syst. Labs., Musashino, Japan
fYear :
1998
fDate :
8-10 Dec 1998
Firstpage :
30
Lastpage :
35
Abstract :
A plastic chip-scale package (CSP) smaller than conventional packages has been developed and applied to ATM switching systems. The package uses a low-cost glass-epoxy substrate. As glass epoxy is widely used in the printed circuit boards (PCBs) of ATM switching systems, its use in the CSPs mounted on a PCB reduces the difference in thermal expansion between PCB and CSPs, thus lengthening CSP life. The power plane, ground plane, and thermal vias of the CSP are designed to offset the increased thermal resistance due to the CSP´s smaller size. Simulation showed a thermal resistance for this CSP with copper layers and thermal vias of as much as 22% less than that of a CSP with no copper layers or thermal vias. A six-layer test board mounting four CSPs was used to simulate a sub-board for ATM switching systems. The thermal resistance of the two CSPs located downstream was about 10% higher than that of the two located upstream. Two CSPs were developed for two types of application-specific ICs: a bus interface controller (BIC) and a peripheral interface circuit (PIC). Both CSPs were 18 mm square with a 0.8 mm outer solder-ball pitch and 256 outer balls. These CSPs occupied areas about 87% and 68% smaller than those of a conventional pin grid array (PGA) and quad flat package (QFP) respectively. The junction temperature of both CSPs satisfied the thermal conditions. These high-performance CSPs are thus attractive for use in ATM switching systems
Keywords :
application specific integrated circuits; assembling; asynchronous transfer mode; chip scale packaging; cooling; electronic switching systems; integrated circuit reliability; microcontrollers; peripheral interfaces; plastic packaging; printed circuit testing; soldering; thermal expansion; thermal management (packaging); thermal resistance; 0.8 mm; 18 mm; ATM switching system PCBs; ATM switching system sub-board; ATM switching systems; CSP area; CSP life; CSP location; Cu; application-specific ICs; bus interface controller; copper layers; glass-epoxy substrate; ground plane; junction temperature; package size; peripheral interface circuit; pin grid array; plastic CSP; plastic chip scale package; power plane; quad flat package; six-layer test board; solder-ball pitch; thermal conditions; thermal expansion; thermal resistance; thermal vias; Asynchronous transfer mode; Chip scale packaging; Copper; Electronics packaging; Glass; Plastic packaging; Printed circuits; Switching systems; Thermal expansion; Thermal resistance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 1998. Proceedings of 2nd
Print_ISBN :
0-7803-5141-X
Type :
conf
DOI :
10.1109/EPTC.1998.755975
Filename :
755975
Link To Document :
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