DocumentCode
2687943
Title
BiNMOS: a basic cell for BiCMOS sea-of-gates
Author
El Gamal, Abbas ; Kouloheris, Jack L. ; How, Dana ; Morf, Martin
fYear
1989
fDate
15-18 May 1989
Abstract
A BiNMOS test chip has been designed and fabricated in 0.8-μm BiCMOS technology. The test chip consists of a 4×22 array of BiNMOS cells. The test structures include a ring oscillator, a 4-bit SRAM (static random-access memory) core, five types of buffers, a MUX, and a shift register. Ring oscillator measurements indicate a basic BiNMOS inverter delay of 240 ps (FO=1), a result that agrees well with simulation
Keywords
BIMOS integrated circuits; logic arrays; random-access storage; 0.8 micron; 240 ps; BiCMOS sea-of-gates; BiNMOS test chip; MUX; SRAM; basic cell; buffers; inverter delay; ring oscillator; shift register;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location
San Diego, CA, USA
Type
conf
DOI
10.1109/CICC.1989.56710
Filename
5726178
Link To Document