• DocumentCode
    2688050
  • Title

    NPCPL : Normal Process Complementary Pass Transistor Logic for Low Latency, High Throughput Designs

  • Author

    Ghosh, Debabrata ; Nandy, S.K. ; Parthasarathy, K. ; Visvanathan, V.

  • Author_Institution
    Indian Institute of Science
  • fYear
    1993
  • fDate
    3-6 Jan 1993
  • Firstpage
    341
  • Lastpage
    346
  • Keywords
    Arithmetic; Degradation; Delay; Digital signal processing; Logic design; Pipeline processing; Signal design; Throughput; Very large scale integration; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 1993. Proceedings. The Sixth International Conference on
  • ISSN
    1063-9667
  • Print_ISBN
    0-8186-3180-5
  • Type

    conf

  • DOI
    10.1109/ICVD.1993.669707
  • Filename
    669707