A simplified approach for quasi-three-dimensional modeling of npn transistors

The transistors are modeled by connecting, in parallel, appropriate combinations of five Gummel-Poon-type compact circuit models. The models are extracted using five simplified n-p-n geometries. For a 1.25-μm BiCMOS technology, there is good agreement between simulated and measured DC n-p-n characteristics, except at high currents. The discrepancies are due to device temperature rise, which was measured in the experiments, and to ohmic voltage drops in the metal leads