Title :
An asynchronous add-compare-select design in CMOS VLSI
Author :
Zhao Bing ; Hei Yong ; Qiu Yulin
Author_Institution :
Microelectron. R&D Centre, Chinese Acad. of Sci., Beijing, China
Abstract :
A novel asynchronous ACS (Add-Compare-Select) is described. The circuit of a novel asynchronous comparator unit is proposed. The performance of ACS is analyzed with the novel method based on multi-delay model. The results of performance analysis of asynchronous ACS show that the average case response time 3.66ns is only 45% the worst-case response time 8.1ns. It reveals that the asynchronous ACS has some performance advantages than the synchronous one.
Keywords :
CMOS digital integrated circuits; VLSI; asynchronous circuits; logic design; 3.66 ns; 8.1 ns; CMOS; VLSI; add-compare-select; asynchronous ACS; multidelay model; response time;
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
Print_ISBN :
0-7803-7889-X
DOI :
10.1109/ICASIC.2003.1277449
