DocumentCode
2688246
Title
A BiCMOS 32-bit execution unit for 70 MHz VLSI computer
Author
Tanaka, S. ; Hotta, T. ; Iwamura, M. ; Yamauchi, Takashi ; Bandoh, T. ; Hotta, A. ; Nakano, T. ; Iwamoto, S. ; Adachi, S.
fYear
1989
fDate
15-18 May 1989
Abstract
A BiCMOS 32-bit execution has been developed to attain 70-MHz (typical) speed using 1.0-μm BiCMOS technology. The three important components are: (1) an arithmetic unit, which uses a 0.6-ns 8-bit carry propagation circuit; (2) a 2.5-ns 54-W×32-b four-port register file, which uses a BiCMOS sense circuit and dynamic bus drivers; and (3) a flag generator, which uses a novel all-bit-zero generation algorithm and generates in parallel with the arithmetic computation. A CLSI computer has been implemented with the above components, and 70-MHz register-register operation has been achieved
Keywords
BIMOS integrated circuits; VLSI; microprocessor chips; 0.6 ns; 1 micron; 2.5 ns; 32 bit; 70 MHz; 8-bit carry propagation circuit; BiCMOS 32-bit execution unit; BiCMOS sense circuit; VLSI computer; all-bit-zero generation algorithm; arithmetic unit; dynamic bus drivers; flag generator; four-port register file; register-register operation;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location
San Diego, CA, USA
Type
conf
DOI
10.1109/CICC.1989.56730
Filename
5726197
Link To Document