DocumentCode :
2688253
Title :
Fracture-mechanics based delamination growth prediction in the very small periphery array (VSPATM) package
Author :
Sundararaman, Viwanathan ; Harries, Richard J. ; Sitaraman, Suresh K.
Author_Institution :
George W. Woodruff Sch. of Mech. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
1998
fDate :
8-10 Dec 1998
Firstpage :
160
Lastpage :
169
Abstract :
Interfacial delamination due to dissimilar material systems is a primary concern in electronic package design. CTE mismatch between layers can generate high interfacial stresses under thermal loads during fabrication, assembly and/or field-use conditions which can compromise interface adhesive integrity. Delamination propagation along such interfaces can degrade or destroy package functionality. This study aims to predict interfacial delamination propagation potential in a novel surface mountable, high I/O very small peripheral array (VSPATM ) package. Delamination growth prediction is based on comparison of interfacial fracture parameters obtained from numerical simulations to critical values determined experimentally using controlled fracture toughness tests. 2D/3D VSPATM package numerical models were constructed with interfacial cracks embedded at critical locations. The energy release rate associated with interfacial fracture was determined using global energy balance and a crack closure technique. The fracture mode mixity was determined using a crack surface displacement method. A material parametric study was also completed using numerical models with pre-existing delaminations to identify material property trends that would lower the failure potential. For a baseline materials suite, the fracture parameters were compared with experimentally determined critical interfacial fracture toughness data to ascertain the possibility of delamination growth. Interface fracture toughness was characterized using a test method that requires simple test specimen, fixture and loading geometries, and a data reduction method
Keywords :
cracks; data reduction; delamination; fracture mechanics; fracture toughness; fracture toughness testing; integrated circuit modelling; integrated circuit packaging; numerical analysis; surface mount technology; thermal expansion; thermal stresses; 2D VSPA package numerical model; 3D VSPA package numerical model; CTE mismatch; VSPA package; assembly conditions; baseline materials suite; crack closure technique; crack surface displacement method; critical crack locations; critical interfacial fracture toughness data; data reduction method; delamination growth; delamination growth prediction; delamination propagation; dissimilar material systems; electronic package design; energy release rate; fabrication conditions; failure potential; field-use conditions; fracture mode mixity; fracture parameters; fracture toughness tests; fracture-mechanics based delamination growth prediction; global energy balance; interface adhesive integrity; interface fracture toughness; interfacial cracks; interfacial delamination; interfacial delamination propagation potential; interfacial fracture; interfacial fracture parameters; interfacial stresses; material property trends; numerical models; numerical simulation; pre-existing delaminations; surface mountable VSPA package; test fixture geometry; test loading geometry; test method; test specimen geometry; thermal loads; very small periphery array package; Assembly; Delamination; Electronic packaging thermal management; Fabrication; Numerical models; Surface cracks; Testing; Thermal degradation; Thermal loading; Thermal stresses;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Packaging Technology Conference, 1998. Proceedings of 2nd
Print_ISBN :
0-7803-5141-X
Type :
conf
DOI :
10.1109/EPTC.1998.755996
Filename :
755996
Link To Document :
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