DocumentCode
2688321
Title
Applying CUDA Architecture to Accelerate Full Search Block Matching Algorithm for High Performance Motion Estimation in Video Encoding
Author
Monteiro, Eduarda ; Vizzotto, Bruno ; Diniz, Cláudio ; Zatt, Bruno ; Bampi, Sergio
Author_Institution
Inf. Inst., Fed. Univ. of Rio Grande do Sul (UFRGS), Porto Alegre, Brazil
fYear
2011
fDate
26-29 Oct. 2011
Firstpage
128
Lastpage
135
Abstract
This work presents a parallel GPU-based solution for the Motion Estimation (ME) process in a video encoding system. We propose a way to partition the steps of Full Search block matching algorithm in the CUDA architecture. A comparison among the performance achieved by this solution with a theoretical model and two other implementations (sequential and parallel using OpenMP library) is made as well. We obtained a O(n^2/log^2n) speed-up which fits the proposed theoretical model considering different search areas. It represents up to 600x gain compared to the serial implementation, and 66x compared to the parallel OpenMP implementation.
Keywords
computer graphic equipment; coprocessors; image matching; motion estimation; parallel architectures; video coding; CUDA architecture; OpenMP library; compute unified device architecture; full search block matching algorithm; graphics processing unit; high performance motion estimation; parallel GPU-based solution; video encoding; Accuracy; Algorithm design and analysis; Complexity theory; Computer architecture; Encoding; Graphics processing unit; Motion estimation; CUDA; GPU; H.264/AVC; Motion Estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture and High Performance Computing (SBAC-PAD), 2011 23rd International Symposium on
Conference_Location
Vitoria, Espirito Santo
ISSN
1550-6533
Print_ISBN
978-1-4577-2050-5
Type
conf
DOI
10.1109/SBAC-PAD.2011.19
Filename
6106014
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