DocumentCode
2688407
Title
BLITZEN: a VLSI array processing chip
Author
Heaton, Robert A. ; Blevins, Donald W.
fYear
1989
fDate
15-18 May 1989
Abstract
An array processing chip for the BLITZEN massively parallel SIMD (single-instruction multiple-data-stream) computer has been developed. The chip includes 128 bit-serial processing elements (PEs) connected in a modified grid. Each PE contains a 16-function logic unit, a single-bit adder, a 32-bit, variable-length shift register, and 1 K of local RAM. The 1-μm CMOS design contains over 1.1 million transistors on a 11.0-mm by 11.7-mm die
Keywords
CMOS integrated circuits; VLSI; digital signal processing chips; parallel processing; 1 kbit; 1 micron; 11 to 11.7 mm; 16-function logic unit; 32 bit; BLITZEN; CMOS; VLSI array processing chip; bit-serial processing elements; local RAM; massively parallel SIMD computer; modified grid; single-bit adder; single-instruction multiple-data-stream; variable-length shift register;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location
San Diego, CA, USA
Type
conf
DOI
10.1109/CICC.1989.56738
Filename
5726205
Link To Document