CMOS/SOS technology and device modeling

Author

Mukhanov, Vladimir E.

Author_Institution

Inst. of Electron. & Math., Moscow State Tech. Univ., Russia

fYear

2000

fDate

2000

Firstpage

63

Lastpage

69

Abstract

Wide opportunities for silicon on insulator (SOI/SOS) technologies in commercial applications (satellite communications, personal communications, atomic engineering etc.) recently have given rise to intensive research based on these technologies. This is due to the advantages of SOI structure in comparison to conventional structures. These advantages include higher performance and radiation hardness. Also, SOS technology is less expensive in comparison to GaAs technology. The article presents the results of MOSFET device modeling for digital VLSI ICs with SOS structure. The modeling was carried out in two stages: modeling of semiconductor device structures (device-level modeling) and circuit modeling of basic logic cells (circuit-level modeling)

Keywords

CMOS digital integrated circuits; CMOS logic circuits; MOSFET; SPICE; VLSI; equivalent circuits; integrated circuit modelling; radiation hardening (electronics); semiconductor device models; silicon-on-insulator; technology CAD (electronics); CMOS/SOS technology; MOSFET device modeling; SPICE; Si-Al₂O₃; TCAD; circuit-level modeling; device-level modeling; digital VLSI IC; equivalent circuit; logic cells; radiation hardness; silicon on insulator technology; Atomic measurements; CMOS technology; Gallium arsenide; Logic devices; MOSFET circuits; Satellite communication; Semiconductor device modeling; Semiconductor devices; Silicon on insulator technology; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Materials, 2000. EDM 2000. Siberian Russian Student Workshops on

Conference_Location

Novosibirsk

Print_ISBN

5-7782-0291-1

Type

conf

DOI

10.1109/SREDM.2000.888548

Filename

888548