Area-universal circuits with constant slowdown

An area-universal VLSI circuit can be programmed to emulate every circuit of a given area, but at cost of lower area-time performance. In particular, if a circuit with area-time bounds (A,T) emulated with a universal circuit with bounds (A_u,T_u), we say that the universal circuit has slowup A_u/A and slowdown T_u /T. A central question in VLSI theory is to investigate the inherent costs and tradeoffs of universal circuit designs. Prior to this paper, universal designs with O(1) blowup and O(log A) slowdown for area-A circuits were known. Universal designs for area-A circuits of O(√A^1+εlogA) nodes, with O(A^ε) blowup and O(log log A) slowdown, had also been developed. However, the existence of universal circuits with O(1) slowdown and relatively small blowup was an open question. In this paper, we settle this question by designing an area-universal circuit U_A^ε with O(1/ε) slowdown and O(ε²A^ε log ⁴A) blowup, for any value of the parameter ε, 1/log A⩽ε⩽1. By varying, we obtain universal circuits which operate at different points in the spectrum of the slowdown-slowup tradeoff. In particular, when ε is chosen to be a constant, our universal circuit yields O(1) slowdown