Title :
Computer aids for high performance CMOS custom design
Author :
Poon, T.C. ; Oh, Y.T. ; Oswald, W.A. ; Magarshack, P.
Abstract :
A set of design tools that creates the framework for a loading-edge full-custom design methodology has been developed. The tools provide the design flexibility and accuracy needed to achieve maximum performance in a quality design. Complex chips with clock rates from 90 MHz to 250 MHz have been economically built using the three latest generations of CMOS processing technologies, sized at 1.75 μm, 1.25 μm, and 0.9 μm
Keywords :
CMOS integrated circuits; application specific integrated circuits; circuit CAD; digital integrated circuits; integrated circuit technology; 0.9 to 1.75 micron; 90 to 250 MHz; ASIC; CAD; CMOS custom design; clock rates; computer aids; design tools; digital ICs; full-custom design methodology;
Conference_Titel :
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/CICC.1989.56792
