DocumentCode :
2689375
Title :
A VLSI wordprocessing subsystem for a real time large vocabulary continuous speech recognition system
Author :
Stölzle, A. ; Narayanaswamy, S. ; Kornegay, K. ; Rabaey, J. ; Brodersen, R.W.
fYear :
1989
fDate :
15-18 May 1989
Abstract :
The authors present the architecture of a word-processing subsystem for a large-vocabulary real-time continuous-speech-recognition system. The system contains three application-specific integrated circuits that perform the Viterbi algorithm for 50000 states using a breadth-first recognition search in real time. This corresponds to a computation rate of 225 million operations per second, excluding memory operations where 670 Mb have to be accessed per second
Keywords :
VLSI; application specific integrated circuits; digital signal processing chips; real-time systems; speech recognition; voice equipment; 670 Mbit; ASIC; VLSI wordprocessing subsystem; Viterbi algorithm; Viterbi processor; application-specific integrated circuits; architecture; backtrace processor; breadth-first recognition search; continuous speech recognition system; large vocabulary; real time; signal processing chips; voice input;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location :
San Diego, CA, USA
Type :
conf
DOI :
10.1109/CICC.1989.56799
Filename :
5726266
Link To Document :
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