Title :
Dominant pole(s)/zero(s) analysis for analog circuit design
Author :
Pillage, Lawrence T. ; Wolff, Christopher M. ; Rohrer, Ronald A.
Abstract :
A prototype frequency-domain simulator that models the nth-order circuit by a lower order q-model has been developed. It combines results equivalent to hand analysis with variable order numerical pole-zero approximation. The dominant poles and zeros, including those that are complex or repeated, are found efficiently on recursive DC analysis of the circuit. In addition, the effect of the variation of element values on the pole locations can be obtained at an incremental cost in CPU time
Keywords :
analogue circuits; frequency response; frequency-domain analysis; linear network analysis; linear network synthesis; poles and zeros; analog circuit design; dominant poles; dominant zeros; frequency response approximation; frequency-domain simulator; linear network analysis; lower order q-model; nth-order circuit; pole locations; recursive DC analysis; variable order numerical pole-zero approximation;
Conference_Titel :
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/CICC.1989.56802
