DocumentCode :
2689841
Title :
SIMD optimization of the H.264/SVC decoder with efficient data structure
Author :
Lee, Joohyun ; Jeon, Gwanggil ; Park, Sangjun ; Jung, Taeyoung ; Jeong, Jechang
Author_Institution :
Dept. of Electr. & Comput. Eng., Hanyang Univ., Seoul
fYear :
2008
fDate :
June 23 2008-April 26 2008
Firstpage :
69
Lastpage :
72
Abstract :
H.264/scalable video coding (SVC) is a new compression technique that can adapt to various network environments and applications. However, despite its outstanding performance, H.264/SVC has considerable complexity burden on decoding, especially in inverse transform and interpolation for motion compensation. We first analyze the Joint Scalable Video Model (JSVM) decoder to identify time-consuming modules of H.264/SVC. Based on the analysis, we present the single instruction multiple data (SIMD) Optimization methods for 4times4 inverse transform and interpolation for motion compensation with an efficient data structure. On a 2.4 GHz Intel Pentium IV processor, the proposed methods reduce considerably the computation time for inverse transform and interpolation for motion compensation, compared to JSVM software.
Keywords :
data structures; interpolation; motion compensation; optimisation; transforms; video coding; H.264/SVC decoder; Intel Pentium IV processor; SIMD optimization; data structure; interpolation; inverse transform; joint scalable video model decoder; motion compensation; scalable video coding; single instruction multiple data; Application software; Automatic voltage control; Data structures; Decoding; Interpolation; Motion compensation; Optimization methods; Scalability; Static VAr compensators; Video coding; Optimization methods; Video coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multimedia and Expo, 2008 IEEE International Conference on
Conference_Location :
Hannover
Print_ISBN :
978-1-4244-2570-9
Electronic_ISBN :
978-1-4244-2571-6
Type :
conf
DOI :
10.1109/ICME.2008.4607373
Filename :
4607373
Link To Document :
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