Title :
CMOS folding and interpolating A/D converter with master-slave T/H circuit
Author :
Fei Liu ; Song Jia ; Lijiu Ji
Author_Institution :
Inst. of Microelectron., Peking Univ., Beijing, China
Abstract :
A 250MS/s, 6-bit CMOS folding and current-mode interpolating A/D Converter is designed in a 1 μm standard digital CMOS process. A master-slave T/H circuit with the offset compensative amplifiers is proposed which can improve sample precision and input bandwidth. The power dissipation of the converter is simulated as 300mW for a 5V supply. The latency between input and output is 2.5 clock cycles.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; integrated circuit design; sample and hold circuits; 300 mW; 5 V; CMOS folding A/D converter; complementary metal oxide semiconductor; current mode interpolating A/D converter; master slave T/H circuit; offset compensative amplifiers; power dissipation; sample precision bandwidth; standard digital CMOS process; track and hold circuit;
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
Print_ISBN :
0-7803-7889-X
DOI :
10.1109/ICASIC.2003.1277636
