DocumentCode
2690860
Title
A 1.8-V 6-bit flash ADC with rail-to-rail input range in 0.18 μm CMOS
Author
Yao, Liangzhong ; Steyaert, M. ; Sansen, Willy
Author_Institution
ESAT-MICAS, Katholieke Univ. Leuven, Belgium
Volume
1
fYear
2003
fDate
21-24 Oct. 2003
Firstpage
677
Abstract
A 6-bit flash ADC with rail-to-rail input range is introduced in this paper. With the input range extension, the LSB is enlarged and the requirements for the component matching is released, reducing the sizes of transistors and the power consumption. Combined with the voltage interpolation technique, the power consumption can be reduced, further more. Simulated with a 0.18 μm CMOS technology file, the converter achieves 6-bit resolution with DNL and INL < 1 LSB up to 1GHz sampling frequency.
Keywords
CMOS integrated circuits; analogue-digital conversion; interpolation; transistors; 0.18 micron; 1 GHz; 1.8 V; CMOS technology; component matching; flash ADC; power consumption; rail-to-rail input range; transistors; voltage interpolation technique;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2003. Proceedings. 5th International Conference on
ISSN
1523-553X
Print_ISBN
0-7803-7889-X
Type
conf
DOI
10.1109/ICASIC.2003.1277639
Filename
1277639
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