DocumentCode
2690913
Title
Design impacts on NAND Flash memory core circuits with vertical MOSFETs
Author
Sakui, Koji ; Endoh, Tetsuo
Author_Institution
Center for Interdiscipl. Res., Tohoku Univ., Sendai, Japan
fYear
2010
fDate
16-19 May 2010
Firstpage
1
Lastpage
4
Abstract
By utilizing the vertical MOSFETs advantages, the compact, efficient, and low-power peripheral core circuit design for the NAND Flash memory has been proposed.
Keywords
MOSFET; NAND circuits; flash memories; integrated circuit design; low-power electronics; NAND flash memory core circuit; low-power peripheral core circuit design; vertical MOSFET; Capacitance; Charge pumps; Circuit synthesis; Decoding; Driver circuits; MOS capacitors; MOSFETs; Manufacturing; Silicon; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Workshop (IMW), 2010 IEEE International
Conference_Location
Seoul
Print_ISBN
978-1-4244-6719-8
Electronic_ISBN
978-1-4244-7668-8
Type
conf
DOI
10.1109/IMW.2010.5488310
Filename
5488310
Link To Document