DocumentCode
2691136
Title
Highly-scalable disruptive reading scheme for Gb-scale SPRAM and beyond
Author
Takemura, R. ; Kawahara, T. ; Ono, K. ; Miura, K. ; Matsuoka, H. ; Ohno, H.
Author_Institution
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
fYear
2010
fDate
16-19 May 2010
Firstpage
1
Lastpage
2
Abstract
We propose a disruptive reading and restoring schemes for high-density SPRAM. The proposed scheme uses the feature that, with a desired error rate, TMR device doesn´t switch its magnetization of free layer in a specific period of large current pulse. The restoring operation is performed to ensure the storing data. As a result, keeping the good scalability of spin-transfer torque writing toward Gb-scale and beyond, high speed reading with read-disturbance-free operation can be achieved. This operation also enables the SPRAM to accept the DDRx-SDRAM compatible operation.
Keywords
DRAM chips; SRAM chips; integrated circuit reliability; DDRx-SDRAM; Gb-scale SPRAM; disruptive reading scheme; high-density SPRAM restoring schemes; high-scalable disruptive reading scheme; read-disturbance-free operation; spin-transfer torque; Error analysis; Laboratories; Magnetoelectronics; Nanoelectronics; Random access memory; Read-write memory; Scalability; Signal restoration; Switches; Writing; MRAM; SPRAM; disruptive reading; restoring and TMR;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Workshop (IMW), 2010 IEEE International
Conference_Location
Seoul
Print_ISBN
978-1-4244-6719-8
Electronic_ISBN
978-1-4244-7668-8
Type
conf
DOI
10.1109/IMW.2010.5488324
Filename
5488324
Link To Document