DocumentCode
2692237
Title
Architectural design for next generation heterogeneous memory systems
Author
Bivens, Alan ; Dube, Parijat ; Franceschini, Michele ; Karidis, John ; Lastras, Luis ; Tsao, Mickey
Author_Institution
T.J. Watson Res. Center, IBM, Yorktown Heights, NY, USA
fYear
2010
fDate
16-19 May 2010
Firstpage
1
Lastpage
4
Abstract
New enterprise workloads requiring fast, reliable access to increasing amounts of data have pushed today´s memory systems to power and capacity limits while creating bottlenecks as they ensure transactions are persistently tracked for reliability. New storage class memory technologies (such as phase change memory) have the potential to offer high capacity within latency and bandwidth ranges acceptable for a computer memory system and persistence which may help ease the system-level burden of balancing performance and reliability. This paper describes architectural options for addressing the challenges of future, heterogeneous memory systems as well as the attributes required of the next generation memory devices.
Keywords
integrated circuit reliability; phase change memories; computer memory system; enterprise workloads; next generation heterogeneous memory systems; phase change memory; storage class memory technologies; Bandwidth; Computer aided manufacturing; Computer architecture; Delay; Memory architecture; Phase change materials; Phase change memory; Power system reliability; Random access memory; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Workshop (IMW), 2010 IEEE International
Conference_Location
Seoul
Print_ISBN
978-1-4244-6719-8
Electronic_ISBN
978-1-4244-7668-8
Type
conf
DOI
10.1109/IMW.2010.5488395
Filename
5488395
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