DocumentCode
2692439
Title
A triple low-power voltage output video 8-bit CMOS DAC
Author
Abrial, A. ; Fournier, J.M. ; Senn, P. ; Bouvier, J. ; Lelah, A.
Author_Institution
CNET, Meylan, France
fYear
1988
fDate
7-9 June 1988
Firstpage
2825
Abstract
The authors describe a CMOS 8-bit triple DAC (digital-to-analog converter) dedicated to video applications. Its main features are low-power consumption at a high video sampling rate (290 mW when sampled at 27 MHz and with 75- Omega loads) and a low-glitch level. Each converter uses a 2/sup N/R technique and an efficient voltage output amplifier for 75- Omega external load. It has been fabricated with an experimental 2- mu m CMOS telecom process with a 250-AA gate oxide thickness, one metallization level, and two polysilicon levels.<>
Keywords
CMOS integrated circuits; digital-analogue conversion; 2 micron; 250 A; 27 MHz; 290 MW; CMOS DAC; CMOS telecom process; external load; gate oxide thickness; low-glitch level; low-power consumption; metallization level; polysilicon levels; triple DAC; triple low-power voltage output; video applications; video sampling rate; voltage output amplifier; CMOS process; Decoding; Impedance; Linearity; Logic circuits; MOS devices; Operational amplifiers; Resistors; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo, Finland
Type
conf
DOI
10.1109/ISCAS.1988.15526
Filename
15526
Link To Document