A comparative study of the program efficiency of gate all around SONOS and TANOS flash memory

An analytic expression was obtained to examine the dependence of dielectric layers thickness and silicon radius on V_th shift, which is an important characteristic of gate all around SONOS/TANOS memory. As the radius of silicon decreases, the V_th shift decreases because of increasing capacitance in dielectric layers under the condition of same trapped charge density. The V_th shift is almost linearly dependant on bottom oxide thickness and top oxide thickness. The maximum V_th shift of TANOS is lower than that of SONOS because of high dielectric constant of blocking layer in TANOS. On the other hand, the program speed of TANOS is faster than that of SONOS.