Title :
Extraction of interface trap density in high-k/Ge gate stacks and determination of the charge neutrality level
Author :
Bozyigit, D. ; Rossel, C.
Author_Institution :
Zurich Res. Lab., IBM Res. GmbH, Ruschlikon, Switzerland
Abstract :
The main focus in this study is the ability to determine the CNL in Ge, defined as the crossing point where acceptor and donor-like trap densities are equal. We find CNL ~0.14 eV above the valence band edge, in good agreement with previous reports [3, 4], which locate it at 0.1 eV. The low-lying CNL is one of the essential reasons for negative charging of Ge surfaces, positive threshold voltage shift in Ge p-FETs and problems in inverting n-FETs.
Keywords :
MOSFET; elemental semiconductors; germanium; interface states; valence bands; Ge; Ge p-FETs; acceptor-like trap density; charge neutrality level; donor-like trap density; high-k/Ge gate stacks; interface trap density; negative charging; positive threshold voltage shift; valence band edge; Capacitance-voltage characteristics; Charge carrier processes; Electron traps; Equivalent circuits; FETs; Frequency; High K dielectric materials; High-K gate dielectrics; Photonic band gap; Substrates;
Conference_Titel :
Device Research Conference, 2009. DRC 2009
Conference_Location :
University Park, PA
Print_ISBN :
978-1-4244-3528-9
Electronic_ISBN :
978-1-4244-3527-2
DOI :
10.1109/DRC.2009.5354888
