0.37 mS/μm In0.53Ga0.47As MOSFET with 5 nm channel and self-aligned epitaxial raised source/drain

InGaAs has been extensively studied as a potential channel material for sub-22nm gate length VLSI MOSFETs because of its low electron effective mass (m ) hence high electron velocity (v). At sub-22 nm gate lengths, a maximum 1 nm EOT dielectric and 5 nm thick channel with strong vertical confinement are required for high subthreshold slope and acceptably low drain induced barrier lowering (DIBL). Most reported InGaAs MOSFETs have ⩾ 10 nm channel thickness. The source/drain (S/D) junctions must be very shallow (˜5nm) with abrupt vertical and lateral profiles, yet extremely low (˜20Ω-μm) source access resistance and consequently very low (˜0.3 /pl Omega/-μm²) contact and (˜500Ω) sheet resistivities are required to minimize degradation of the drive current (I_d) and transconductance.