Size reduction of Microstrip Patch Antennas via Artificial Dielectric Loading

The first part of this presentation focuses on the analysis and design of a size-reduced antenna. Although these antennas have three-dimensional structures embedded in the substrate, they can be easily fabricated through the cost-effective LTCC process. Experimental results for the canonical form of the size-reduced antenna are shown to support theory. In addition to the original antenna design, variations with enhanced performance characteristics are also presented. Examples of modifications that further reduce the antenna size follows a discussion of the original design. It is demonstrated that introducing one or more open-ended slits in the patch can aid in shrinking the size of the antenna. Essentially, these slits cause the current distribution to be routed along a circuitous path. The resulting design is a planar antenna with a longer effective resonant length. Extensive simulations for the modified version of the size-reduce antenna are presented