Title :
A Refractory Self-Aligned Gate Process for Monolithically Combined Microwave and Digital GaAs ICs
Author :
Geissberger, A. ; Sadler, R. ; Griffin, E. ; Bahl, I. ; Singh, H. ; Drinkwine, M.
fDate :
May 9 1975-June 11 1987
Abstract :
We present a process for monolithically fabricating microwave and DCFL digital GaAs circuits. The process employs refractory metal SAG FETs with techniques to provide low gate resistance and high output resistance and break-down voltage. Using a 1.0 µm gate length, 1.5 dB noise figure with 10.2 dB associated gain at 10 GHz analog performance and 65 ps typical propagation delay at 0.5 mW/gate (fan-in/fan-out = 2/2) DCFL digital performance have been obtained.
Keywords :
Analog integrated circuits; Digital circuits; Digital integrated circuits; FETs; Fabrication; Gallium arsenide; Implants; Logistics; Manufacturing processes; Resists;
Conference_Titel :
Microwave Symposium Digest, 1987 IEEE MTT-S International
Conference_Location :
Palo Alto, CA, USA
DOI :
10.1109/MWSYM.1987.1132498
