Lyapunov stability analyses of digital phase-locked loops

This paper uses Lyapunov stability theory to analyze the stability properties of digital phase lock loops (DPLLs). As is the case with most stability analyses, this paper deals with the noisefree case. While practical analysis and simulation of a real system must include some noise model, a prerequisite for such analysis is the knowledge or assumption of the system´s stability. The stability conditions derived in this paper are the same as those obtained elsewhere. The purpose of this paper is to expose Lyapunov theory as a viable option for DPLL design and analysis